Position : Staff IC Layout Design Engineer
Location : Biel, Switzerland
Employment : Permanent
About the client
We are a leading supplier of high-performance electronic components for high-voltage power-conversion systems. Our integrated circuits and diodes are critical for creating compact, energy-efficient AC-DC power supplies used in a wide range of electronic products, including mobile devices, TVs, PCs, appliances, smart utility meters, and LED lights. Our SCALE™ IGBT drivers enhance the efficiency, reliability, and cost-effectiveness of high-power applications such as industrial motor drives, renewable energy systems, electric vehicles, and high-voltage DC transmission.
About the client
We are seeking a highly skilled and experienced Team Leader - Staff IC Layout Design Engineer to join our design engineering team in Biel / Bienne, Switzerland. The ideal candidate will lead a team of layout design engineers, drive innovative layout solutions, and ensure the highest standards of quality and performance in our IC designs.
RESPONSIBILITIES :
- Develop economic, efficient, and demanding gate driver and power conversion related products.
- Perform layout design of smart power functional blocks and complete mixed signal ICs from block level to tape-out release, focusing on top level layout design.
- Run automated DRC and LVS controls to ensure full compliance with designed electrical circuits.
- Collaborate with colleagues in the IC Design team to define chip architecture, refine it to block level, and be responsible for IC top level floor planning and area estimation.
- Define innovative layout solutions that implement complex and intellectually challenging functions and control schemes necessary to deliver target system performance.
- Coach and support layout engineers during physical design and related verification.
- Lead the layout team, focusing on both technical aspects and team management.
- Train young layout engineers to bring them up to full speed.
- Contribute to technology process and layout design methodology improvements.
REQUIRED EXPERIENCE :
BSc or MSc in Microelectronics or a related degree.Minimum of 8-10 years of experience in IC layout design.Deep knowledge and understanding of best-practice IC layout design methods (theory and practice).Strong analytical and problem-solving skills.Strong team-working attitude.Solid experience in analog and mixed signal integrated circuit layout design and related CAD tools; knowledge of Cadence Virtuoso and Calibre verification tools is a strong plus.Strong knowledge of chip top-level assembly and tape-out closure procedures.Good understanding of semiconductor technology with a focus on medium / high voltage CMOS, BCD, BiCMOS, including parasitic components and related effects.Knowledge of ESD and latch-up issue reduction techniques.Successful track record of taped-out IC designs.Deep knowledge of the English language, both written and spoken.