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p570 Cisco Systems (Switzerland) GmbH in Thalwil, Switzerland, seeks an experienced ASIC design lead to define, design, and verify high-performance subsystems for Cisco platforms. You will oversee analog/mixed-signal architecture and collaborate with cross-functional teams to optimize power, performance, and area. /ppThe role requires extensive experience with high-frequency CMOS design, Cadence Virtuoso, and scripting in Python/MATLAB/C. A strong publication or patent track is a plus. /p #J-18808-Ljbffr
Lead ASIC Engineer: High-Performance Subsystems • thalwil, zürich, Switzerland
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