StellenbeschreibungppThe Integrated Devices, Electronics, and Systems (IDEAS) Group develops cutting‑edge system‑level integrated circuits (ICs) for next‑generation communication and sensing technologies, with applications in 6G, satellite communication (SATCOM), and AI data‑center connectivity. Our research is funded by multiple EU, ESA, and Swiss programs and projects, and contributes directly to European digital sovereignty. /p pThese system‑level IC chips are built from highly sophisticated transistor‑level circuits and combine extensive analog, digital, and mixed‑signal components that need to operate together to deliver full system functionality. Testing these complex ICs also requires automated test codes and operating high‑end electronic measurement facilities. /p pWe are seeking a research assistant to join our IDEAS team and contribute to analog/digital circuit design, system integration, and testing of complex IC chips. The anticipated start date is Monday, 3 August 2026. /p h3Project background /h3 pNext‑generation communication and sensing systems rely on system‑level ICs with increasing complexity and integration. These highly integrated ICs typically include sophisticated support circuits, such as programmable analog biasing circuits with temperature compensation, high‑speed digital interfaces with on‑chip memory, and mixed‑signal circuits such as low‑power, compact analog‑to‑digital converters (ADCs) for on‑chip performance monitoring and Built‑In‑Self‑Testing (BIST). /p pThe IDEAS Group has already developed and silicon‑verified a range of these supporting circuits, providing a strong basis for the design of new system‑level ICs. Designing these next‑generation ICs is the core of our research and technology development, along with the testing required to bring them to life and make real‑world impacts. /p pThis position is intended for a candidate who can design, implement, and refine analog, digital, and mixed‑signal support circuits for integration into future system‑level ICs. The work will support real‑world applications and help advance next‑generation communication, computation, and sensing systems. The successful candidate will also develop test PCBs, set up measurement environments, and perform automated testing of the developed ICs. /p h3Job description /h3 ul liDesign, implement, and refine analog, digital, and mixed‑signal support circuits for system‑level ICs. Example circuits include but are not limited to programmable biasing circuits, temperature‑compensation loops, digital programming and interface circuits, on‑chip memory, and low‑power compact ADCs for performance monitoring /li liSupport top‑level assembly of system‑level ICs, including LVS, DRC, and density checks /li liDevelop test PCBs, set up measurement environments, and support automated testing of complex IC chips /li liLead the execution and analysis of system‑level IC test campaigns to validate performance under various operating conditions /li liDocument and investigate test anomalies /li liPrepare formal test reports for internal reviews and project deliverables /li liDevelop and maintain automated test frameworks to improve repeatability, traceability, and testing efficiency /li /ul h3Profile /h3 ul liMaster's degree in Electrical Engineering, Electronics, Microelectronics, or a related field /li liPrior experience in analog, digital, and mixed‑signal IC circuit design, with familiarity with IC design tools and tapeout flows, including digital circuit synthesis /li liPrior experience in printed‑circuit board (PCB) design /li liTapeout experience is a plus /li liIC testing experience using Keysight and RS equipment is a plus /li liExperience working in fast‑paced research environments /li liHighly organized, dependable, and able to manage multiple tasks efficiently /li liMotivated to contribute to a collaborative and interdisciplinary research environment, with a strong commitment to technical excellence /li liHigh professional integrity, maturity, and a constructive working style /li liExcellent communication skills in English, the IDEAS team's working language /li /ul h3We offer /h3 ul liA 1-year contract at the IDEAS Lab at an 80-100% workload; renewal is possible depending on performance and funding availability /li liA stimulating, collaborative environment in a world‑leading multidisciplinary electronics research team at ETH Zurich /li liThe opportunity to support ongoing research projects in next‑generation communication and sensing technologies for the digital revolution /li liHands‑on experience in complex system‑level IC design, development, integration, and testing /li liMembership in a motivated, supportive, and collaborative team /li liThe opportunity to learn from experienced researchers and technical experts while contributing to high‑impact research projects and European digital sovereignty /li /ul pWorking, teaching and research at ETH Zurich /p h3We value diversity and sustainability /h3 pIn line with our values, ETH Zurich encourages an inclusive culture. We promote equality of opportunity, value diversity and nurture a working and learning environment in which the rights and dignity of all our staff and students are respected. Visit our Equal Opportunities and Diversity website to find out how we ensure a fair and open environment that allows everyone to grow and flourish. Sustainability is a core value for us - we are consistently working towards a climate‑neutral future. /p pCurious? So are we. /p pWe look forward to receiving your online application with the following documents: /p ul liCover letter outlining your motivation and experience /li liConcise CV /li liDiploma and certificates /li liA list of names and contact information for three to five references. /li /ul pFurther information about the IDEAS Group can be found on our Website. Questions regarding the position should be directed to (no applications). /p pPlease note that we exclusively accept applications submitted through our online application portal. Applications via email or postal services will not be considered. /p pWe would like to point out that the pre‑selection is carried out by the responsible recruiters and not by artificial intelligence. /p /p #J-18808-Ljbffr
