FPGA Engineer - 3 month contract, CH

ppWe at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of customers reads like a who’s is who of the technology world. If you love to be part of an adventure of a startup challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you. /p pKandou is actively seeking a resourceful FPGA Engineer contractor. /p h3Responsibilities /h3 ul liFPGA concept and design definition /li liClose interaction with Verification engineers, Digital designers and validation/characterization engineers /li liValidation and bring-up of devices and FPGAs in the lab /li liPrototyping of new digital designs in FPGAs /li liFPGA design and verification of very high-speed digital circuits /li liSelection of FPGAs and tool set /li liSupport for post-silicon lab bring-up, debug, characterization and productization. /li liPost processing of validation results in Python /li liAnalysis and understanding of high-speed serial protocols (USB4, PCIe, DP and Physical Coding Layer (PCS) ) /li liClose interaction with verification and physical implementation engineers to verify circuit functionality and compliance with area, timing and power requirements /li liSupport and interact with internal/external customers on requirements, design specifications, performance results /li liManage workload and schedules and report to internal management team and external customers /li /ul h3Skills /h3 ul liStrong interest in the design of FPGAs and blocks for multi-Gigabit serial and parallel data-link transceivers /li liScripting (Python preferred) and tool setup skills. /li liPassionate about FPGAs and FPGA design /li liKnowledge of high-speed and low-power design techniques, and high-speed serial protocols is a plus /li liSelf-motivated, with strong sense of ownership and responsibility. /li liGood communicator and team player with strong analytical skills /li liStrong RTL coding skills (SystemVerilog preferred) /li liUnderstanding of verification methodologies, in particular UVM, is an advantage. /li /ul h3Experience /h3 ul li5-10 years’ experience in designing for FPGA targets /li liStrong technical background in FPGA design, validation and verification /li liProven experience in design and verification of FPGAs /li liExperience in industry standard FPGA tools for design, simulation and verification /li liExperience in digital high-speed blocks. High Speed interface competence and/or PCS experience would be a plus /li liExperience in prototyping digital designs in FPGAs /li liProven experience with lab instruments and bench measurements for design validation /li liExperience using Python or other scripting language for design validation and data analysis /li /ul /p #J-18808-Ljbffr